Integrated memory controller and northbridge. RAM Integrated controller

Since the appearance of processors based on the Nehalem core, everyone considered an integrated three-channel memory controller to be one of their advantages. Not just an integrated memory controller (ICP for short), namely three-channel. It's clear why this is "cool" - after all, AMD had single-channel and dual-channel memory controllers five years before, so an additional channel, and even the fastest DDR3 memory at the moment, looked like a very serious advantage. According to many users, it is also one of the main factors to which the Core i7 processors owe their high performance. It is worth noting that Intel itself did not refute this opinion in any way, for which it paid a little - truly mass processors of the Nehalem architecture, which will be released in early autumn, are designed for the LGA1156 construct, which involves the use of only two memory channels. It would seem that a serious drawback of new models, which will not be able to allow them to compete with their older brothers. But is it?

In motherboard reviews, we have already tried to evaluate the usefulness of the multi-channel memory mode in LGA1366 processors, and the results were, to put it mildly, disappointing. For modes, of course, not for users. However, the tests were carried out on a very limited number of applications, so they did not give a final answer to the question of whether a three-channel mode is needed in practice. We have now decided to fill this gap. More precisely, at first there was simply a desire to try out not a three-channel, but a two-channel mode, for the subsequent more correct comparison of the performance of the Core i7 900 and 800 series: so as not to build hypotheses about what most affected the results (if they, Indeed, they will be significantly different). However, simply “running” the tests from the latest version of our methodology in another configuration is too boring, and even such a confrontation with only two options for a good article cannot turn out, so we complicated the task a little.

Test stand configuration

All testing was carried out using processor core i7 920, motherboard Intel boards DX58SO ("Smackover") and reference video cards based on NVIDIA GeForce GTX 275 - in a word, as it should be, according to version 4.0 of our testing methodology. Only the memory differed. In addition to the Kingston kit we usually use, we also took a kit from Apacer, which has half the volume. All modules support work on more than high frequencies than the official for the Core i7 920 1066 MHz, but we tested them at this frequency according to the 8-8-8-19 scheme.

It turned out four configurations presented in the table:

Why exactly them? We need two three-channel channels in order to clearly understand what is important in some application: three-channel or total volume? This will be clearly visible from the results: if both 3x2 and 3x1 are winners, then there is a benefit from three channels, if only the first, then the application just needs a lot of memory (more precisely, it is able to use it). Without 3×1, it would be difficult to come up with a clear answer. The usefulness of participation in 2 × 2 tests is obvious - this is how modern systems on Core 2 and AMD processors, and for some time it will become very popular for systems based on LGA1156 (of course, it would be possible to test the memory in a 2x1 configuration, but this is not at all interesting from the point of view of systems that do not belong to the budget sector). 1×4 looks extremely synthetic, since it is unlikely that someone, having two 2 GB memory modules, will install them in one channel, “despite” the rest, however ... We need it to increase general education. Yes, and DDR3 modules with a capacity of 4 GB have already appeared. Unfortunately, while this is exotic, it has not even reached our hands (otherwise, the 2 × 4 option would have been in the list of tested ones), however, the mass distribution on the market of both such modules and kits based on them is only a matter of time.

Detailed results of all subtests, as usual, are presented in a table in Excel format. Note that in today's testing, they will sometimes be even more interesting than the general averages for groups, so those who are interested in detailed information should not deny themselves the pleasure of getting to know them.

Zeroing

But first, we decided to test the performance of each of the options in a synthetic application, which today was Everest 4.6 (yes, this is far from latest version popular test package, however, the "real" software is not updated instantly, so these results are very interesting to us even if we assume that 4.6 is poorly optimized under Nehalem).

And the very first results are somewhat discouraging - as we can see, there is no visible increase from the use of the third ICP channel. Moreover, three modules from Apacer cope with this task more slowly than two from Kingston. At the same time, the single-channel mode is a clear outsider. The theoretical bandwidth of DDR3 1066 is 8528 MB / s, which is what we came up against - this is understandable. But adding one more channel increases the reading speed not by two, but by less than one and a half times, and the third one does nothing at all.

It's even more fun with the recording speed - the single-channel mode honestly ran into the theoretical bandwidth, and the increase in the number of channels gave only less than 20% in all cases.

And finally, access delays. The obvious leader here is the two-channel mode (recall that in this diagram the lower the numbers, the better), although single-channel access does not worsen things much, in the three-channel mode the delays increase relatively strongly: by a quarter.

It is already possible to draw certain conclusions. As we remember from the behavior of other ICP architectures (AMD K8/K10), they are most susceptible to memory access delays, which is very noticeable in real applications. It is unlikely that Nehalem will behave exactly the opposite. And all this against the background of the same read and write speeds, that is, the dual-channel mode should become a leader. Single-channel is no longer a fact that it will be too fast: there are less delays, but the memory bandwidth is much lower, and this cannot but affect. How much - we will check. And along the way, let's see how different applications relate to different total amount of memory: synthetic benchmarks cannot give any information about this.

3D visualization

Both three-channel configurations turned out to be outsiders, from which we can conclude that the main thing for this group of applications is access delays. But these two options behave differently, and the study of detailed test results shows a rather mixed picture, from which we can conclude that not only three, but even four gigabytes of memory is no longer enough for some applications.

Rendering 3D scenes

Rendering is generally not very sensitive to the characteristics of the memory system, which could have been assumed from the very beginning - the main thing here is the "numerical" abilities of the computing cores and their number (and "virtual" computation threads are also perceived positively). Moreover, there are no special requirements for the amount of memory - as long as it is enough for the calculated scene and overhead costs. For our tests, 3 GB is enough, which is what the diagram above shows us.

Scientific and engineering calculations

And in this group, another class of applications appears, in addition to those who need as much memory as possible and for whom the volume is not important - those who start to work more slowly depending on the increase in RAM. At first glance, the situation is inexplicable - if the speed drops due to a lack of memory, this is easy to understand, but simply no one should “notice” the excess. On the other hand, why not? The effectiveness of caching may well depend on the amount of RAM and even should depend on it. If a particular application uses only a small amount of memory, and a constant one, it will "get" a different amount of processor cache. For example, with six gigabytes installed, only half of the 8 MB of L3 cache will be allocated for the data of the “foreground” program (do not forget that someone can also “live” in the remaining memory, albeit not very actively, but at the same time claim), and with three, 2/3 of 8 MB will be engaged in their maintenance. A curious effect, of course, is a pity only somewhat aside from the main theme of our study lying. With it, everything is as usual - on average, the dual-channel mode turns out to be the fastest, and of the two variants of the three-channel mode, despite the presence of the rogue applications mentioned above, the one where the total amount of memory is higher is more productive.

Raster graphics

Basically, everything is clear, because among the raster editors we meet all three already defined "groups" of applications. Although with some variations - for example, both Corel products do not care how much memory and which one - 3 or 4 GB does not matter, but if only not 6. But it turned out just a very “memory-friendly” application - Adobe Photoshop. And here it is very interesting overall result subtests, and some of them separately. More precisely, one - Convert. And it is so interesting that we will duplicate in the article the corresponding piece of the table with “raw” data.

Conclusion? Despite the fact that most of the reviews on the net comparing processors of different architectures in this application (there is simply no Photoshop test in a minority of reviews, so you can even say that in all articles of this kind), it is argued that the Core i7 is simply an ideal processor for Photoshop, as we can see, there is nothing particularly outstanding in it. The ideal here is not the architecture of the kernel, but the amount of memory. At 6 GB, the Core i7 920 is twice as fast as the Core 2 Quad Q9300, provided with just 4 GB. It is these comparisons that are found in most articles (including on our website, but other resources behave similarly): 3x2 for processors under LGA1366 and 2x2 for Core2, AMD Phenom, etc. But if we limit the first of the processors to the same 4 GB (and it doesn’t matter how typed), then it turns out ... that the difference from the Core 2 Quad is quite within the acceptable range, in terms of the difference in clock frequency. And if we “take away” just one more gigabyte of memory from the Core i7 (it would seem - 3 or 4: the difference is small), then the result will worsen even more twice! This is the most illustrative example, however, other subtests behave in a similar way, albeit microscopically, but the difference is always found. And there's nothing to be done - Photoshop really "loves" the memory, and the more the files processed in it "weigh", the more it "loves", and all performance testing utilities in this application (and not just our self-written tests), of course, operate precisely large files.

However, it cannot be said that the high results are not at all the merit of the Core i7 itself, but only preferences from a large amount of memory. The three-channel ICP just allows you to install more memory, all other things being equal. But we will talk about this in detail a little later.

Data compression

Archiving programs do not know how to use too much memory, so it simply harms them - they are very susceptible to the available cache memory capacity. They are even more susceptible to delays in the main RAM, which is why we have such a picture - the slowest configuration is 3x2, and latency prevents 3x1 from reaching the first place.

Compiling (VC++)

The project we are compiling does not require a lot of memory, so delays are important, as well as a little read and write speed. Therefore, the dual-channel memory access mode turned out to be the best here, but the single-channel mode only slightly outperformed the three-channel ones - the latency is lower, but so are other parameters.

Java

The Java machine test turned out to be very sensitive to the speed of reading from memory, but its overall size is also quite important for him. Such a picture could be expected everywhere, if the naive assumptions that three-channel memory access is the key to high performance, but there is never a lot of memory, were true. The only pity is that among the tested applications, these dreams are confirmed just a couple of times. But, just an example, when confirmed.

Audio encoding

An excellent task - the requirements for the memory system, one might say, are absent. When rendering, they were also almost absent, but here they are completely absent. The ideal benchmark of processors, however, is disgusting for testing the system as a whole.

Video encoding

And here everything is almost as it should be in the "naive theory". Only the insufficiently noticeable loss of the two-channel mode spoils the picture. More precisely, it will be said, almost imperceptible. And the fact that it exists at all, we owe to exactly one application - DivX. An example of good optimization for all the features of today's Core i7. We will check how he behaves at “tomorrows” in less than a month.

Gaming 3D

Very, very calm, a little incomprehensible overall picture. However, beneath the outward calm, a real storm lurks in the detailed results. The passions of games are very divided, and which ones have it like - we will leave it as a task for self-study. The main conclusion is that for games (namely, as a set, and not for one specific game), the issue of memory configuration is not important. In general, it is even less necessary to solve it than the question of choosing a central processor (of course, if we are not talking about a very low-end sector, such as Core 2 Duo or Pentium / Celeron in general). The main question facing the “hardcore” gamer today will be: “Will I pull on a multi-GPU or will I have to somehow limit my desires?”

Why do you need a three-channel ICP?

As we can see, there is no great benefit from using the third channel of the memory controller in the Core i7 LGA1366. The channel is there, it is possible to use it, but the results are far from always improving. More often than not, they get worse. So why did Intel make the ICP exactly three-channel? Out of a desire to play with muscles (the competitor has two, and we will do all three)? Perhaps there was such a temptation too, but it is unlikely - after all, three channels are given at a rather high price. And in the literal sense: the layout of the boards becomes very complicated, and complicated means expensive. Processors can be made inexpensive (and the Core i7 920 we used today is a vivid example of this - its retail price is like the Core 2 Quad Q9650), but the platform itself turns out to be expensive. And without much benefit - for most "typically user" applications, it is now easy to limit yourself to two 2 GB modules and not worry (especially considering the percentage still using 32-bit operating systems, where more RAM simply will not be used). As it was said in a good joke about a camel and his mother: “Why do we need these bells and whistles if we still live in a zoo?”

The fact of the matter is that the current Core i7, in fact, live in a zoo. "Real" desktop models designed for the LGA1156 version will be best suited for it, the main (and indeed the only) difference of which from LGA1366 is the support of "only" dual-channel memory mode. And LGA1366 is a server platform from the very beginning. Servers need a lot of memory. Not 4, not 8, not even 12 GB, but really a lot. There, even fifty gigabytes can easily be in demand, or even insufficient. How can you install more memory in one system? The total volume is equal to the product of the number of modules and their volume. Therefore, it is necessary to increase either the number or capacity of each module. The second one is complicated and, generally speaking, does not depend on processor/chipset manufacturers. Moreover, the development by the industry of more "dense" memory chips has a beneficial effect on all manufacturers of server platforms at the same time, so it cannot become a competitive advantage.

So, it is necessary to increase the number of supported modules. And it is equal (generally) to the number of memory controllers multiplied by the number of modules each supports. The latter is the product of the number of supported channels by the number of modules simultaneously working on each channel. Increasing the latter is a very difficult task, since at the same time it is necessary not to worsen the speed characteristics, at least. This problem even manifests itself in desktop systems, where more than two or three modules per channel are not used. For example, it can be like this: one module - DDR3 1333, two - DDR3 1066, three - DDR3 800. Of course, a lot of slow memory is sometimes better than a little fast memory, but it is still undesirable to go to such expenses. And sometimes it's impossible.

Intel worked on the problem of increasing the number of memory modules supported by one controller channel for a long time and not without success. However, it turned out that the final result (FB-DIMM) satisfies the initial requirements, but its use causes a lot of undesirable side effects.

There is only one way left - firstly, to transfer the memory controller to the processor, which in a multiprocessor system automatically provides us with support for several memory controllers. Second, increase the number of memory channels. Both of these were done. Result? In a dual Xeon system, as well as a dual Opteron system, there are two memory controllers. Only in the first one, both are three-channel, and in the second - two-channel, which gives us six and four memory channels, respectively. When installing two memory modules per channel (very gentle mode), there will be 12 of them in the first system, and 8 in the second. Let's say each module has a capacity of 4 GB, then the first system will have 48 GB, and the second - 32 GB. In a number of tasks, this will immediately provide the first system with a significant advantage. But how to “finish off” memory up to 48 GB in a server based on Opterons with the same modules? It's easy - we install three modules per channel and ... the whole memory system starts to work more slowly, because, for example, delays will have to be greatly increased. And it turns out: at the same memory speed, the "i" system has one and a half times more memory than the "a" system, and with an equal volume, the "i" system works with memory faster than the "a" system.

That is why the Xeon needs a three-channel memory controller. It is also needed in Opteron, but it was not possible to do it in due time. Just like now, Intel failed to implement four channels. All the same, both manufacturers should follow this path, since one of them has already tried to go down this path (namely, FB-DIMM and increase the number of modules per channel) and was not very satisfied.

And why is all this in the zoo, on the desktop ordinary user? That's right - no need. Who needs - those multiprocessor workstation buy and reduce the task to the previous one. The bulk somehow did not burn with desire to install 8 GB into computers (although this has been available for a long time), so it makes no difference - you can put 12 or whatever. Moreover, now with two modules per channel of a dual-channel memory controller, you can get 16 GB, and the question - how much worse / better than 24 GB, for a normal computer user is akin to the question of how many angels fit on the tip of a needle.

Total

When looking at the final diagram, a natural question arises - why did we do all this? After all, it is clear that almost everyone came to the finish line at the same time. The hypothetical single-channel mode showed its relative meaninglessness, the dual-channel mode - as it could be assumed from the tests in synthetics, turned out to be the fastest. The 2% spread between best and worst cases on such a representative number of applications is very good result. Shows that, be that as it may, but basically our current testing methodology continues to be a testing methodology for processors, and other characteristics of the system have very little effect on the overall final score.

But! It's too early to settle down on this - as we can see, in the overall standings it turned out to be an idyll precisely because different applications balance each other, but they behave in completely different ways. Someone needs a lot of memory, someone needs an increase in memory, on the contrary, it interferes, someone doesn’t care about volume, but low latency is vital, but DivX, in fact, “despised” all objectively existing memory parameters and gave preference to a three-channel mode in any form. Therefore, when comparing systems with different memory configurations within the framework of one article (or independently), in specific tests, you should not forget to ask how exactly this or that result was obtained. However, we don't have to deal with different configurations for very long - LGA1156, we recall, supports only two memory channels, so everything will be simple and logical with these processors. We will continue to test devices in the LGA1366 design in a 3x2 configuration, but sometimes we will also remove 2x2 from storage (when it is undesirable to make mental corrections for the features of the memory system). One could even completely switch to the latter, but there is no point - on average, they are, of course, somewhat faster, but support for three memory channels is an exclusive feature of LGA1366, so let it take the rap. We just need to remember that three-channel memory access on this platform does not increase performance at all, but even vice versa.

Memory

Memory is a device for storing information. It consists of operational and permanent storage devices. The working memory is called RAM, read-only memory - ROM.

RAM - volatile memory

RAM is designed to write, read and store programs (system and application), initial data, intermediate and final results. Access to memory elements is direct. Other name - RAM(Random Access Memory) memory with random access. All memory cells are combined into groups of 8 bits (1 byte) and each such group has an address by which it can be accessed. RAM is used for temporary storage of data and programs. When the computer is turned off, the information in RAM is erased. RAM is volatile memory. V modern computers the amount of memory is usually between 512 MB and 4 GB. Modern application programs often require 128-256 or even 512 MB of memory for their execution, in otherwise the program just won't work.

RAM can be built on dynamic chips (Dinamic Random Access Memory - DRAM) or static (Static Random Access Memory - SRAM) type. The static type of memory has a significantly higher performance, but is much more expensive than the dynamic one. SRAM is used for register memory (MPP and CASH), while main memory RAM is built on the basis of DRAM chips.

ROM is non-volatile memory.

In English literature, ROM is called Read Only Memory, ROM(read-only memory). The information in the ROM is written at the factory of the memory chips, and its value cannot be changed later. ROM stores information that is independent of the operating system.

ROM contains:

• 
  Processor control program
• 
  Programs for controlling the display, keyboard, printer, external memory
• 
  Computer startup and shutdown programs (BIOS - Base Input / Outout Sysytem)
• 
  Device test programs that check the correct operation of its units every time the computer is turned on (POST -Power On SelfTest)
• 
  Information about where on the disk is located operating system.

CMOS - non-volatile memory

CMOS RAM is non-volatile computer memory. This rewritable chip has a high cell density (each cell has a size of 1 byte) and low power consumption - it has enough power for it. batteries computer. It got its name from the technology of creation based on complementary metal-oxide semiconductors ( complementary metal-oxide semiconductor- CMOS). CMOS RAM is a database for storing PC configuration information. The Setup BIOS computer startup program is used to install and store configuration settings in CMOS RAM. Each time the system is booted, the parameters stored in the CMOS RAM chip are read to determine its configuration. Moreover, since some computer startup parameters can be changed, all these variations are stored in CMOS. Program BIOS settings When writing, SETUP saves its system information in it, which it subsequently reads by itself (when the PC boots). Despite the obvious connection between BIOS and CMOS RAM, they are completely different components.

Keywords this lecture

controllers, chipset, ports, USB, COM, LPT, BIOS POST, CMOS, Boot, I/O devices,

(controller- regulator, control device) - a control device for various computer devices.

Chipset(chip set)

A set of chips designed to work together to perform a set of functions. So, in computers, the chipset located on motherboard, performs the role of a connecting component that ensures the joint functioning of the memory subsystems, the central processing unit (CPU), input-output and others. Motherboard (motherboard, MB, also used as the name main board- main board; slang. Mother, mother, motherboard) is a complex multilayer printed circuit board on which the main components are installed personal computer(central processor, RAM controller and RAM itself, boot ROM, controllers for basic I / O interfaces), chipset, connectors (slots) for connecting additional controllers using USB, PCI and PCI-Express buses.

north bridge(Northbridge; select Intel chipsets, Memory Controller Hub, MCH) - chipset system controller on the motherboard x86 platform, to which, as part of the organization of interaction, are connected:

via Front Side Bus - microprocessor,

via the memory controller bus - RAM,

via graphics controller bus - video adapter,

connected via internal bus south bridge.

south bridge(Southbridge; functional controller; I/O Controller Hub, ICH). Usually this one chip on the motherboard, which, through the North Bridge, connects “slow” (compared to the “CPU-RAM” connection) interactions with the central processor (for example, bus connectors for connecting peripherals).

AGP(from the English Accelerated Graphics Port, accelerated graphics port) - developed in 1997 by Intel, a specialized 32-bit system bus for a video card.

PCI(eng. Peripheral component interconnect, literally - the relationship of peripheral components) - an input / output bus for connecting peripheral devices to the computer motherboard.

Ultra DMA(Direct memory access, Direct memory access). different versions ATA are known under the synonyms IDE, EIDE, UDMA, ATAPI; ATA (English Advanced Technology Attachment - attachment by advanced technology) - a parallel interface for connecting drives (hard drives and optical drives) to the computer. Was the standard on the IBM PC platform in the 1990s; is currently being supplanted by its successor - SATA and with its appearance was called PATA (Parallel ATA).

USB(Eng. Universal Serial Bus - “universal serial bus”, pronounced “u-es-bi” or “u-es-be”) - a serial data transfer interface for medium-speed and low-speed peripheral devices in computer science. To connect peripheral devices to the USB bus, a four-wire cable is used, with two wires ( twisted pair) in differential switching are used to receive and transmit data, and two wires are used to power a peripheral device. Thanks to the built-in USB power lines, you can connect peripheral devices without their own power source (the maximum current consumed by the device through the USB bus power lines should not exceed 500 mA).

LPT- port (standard printer device "LPT1" Line Printer Terminal or Line PrinTer) in operating systems MS-DOS family. IEEE 1284 (printer port, parallel port)

COM-port ("com-port" Communication port, Serial port, serial port, serial port) - a bidirectional serial interface designed to exchange bit information. This port is called serial because information is transmitted through it one bit at a time, bit by bit (unlike a parallel port).

PS/2- a connector used to connect a keyboard and mouse. It first appeared in 1987 on the IBM PS/2 computers and subsequently gained recognition from other manufacturers and became widespread in personal computers and workgroup servers. a series of IBM personal computers based on Intel 80286 and Intel 80386 series processors, produced since April 1987. /2 - computer version.

Memory controller

Memory controller - digital circuit, which controls the flow of data to and from main memory. May be a standalone chip, or be integrated into a more complex chip, such as a northbridge, microprocessor, or system-on-a-chip.

Computers using micro Intel processors traditionally had a memory controller built into the chipset (northbridge), but many modern processors such as the DEC/Compaq Alpha 21364, AMD Athlon 64 and Opteron, IBM POWER5, Sun Microsystems UltraSPARC T1 and Intel Core i7 processors have an integrated memory controller located on the same chip, to reduce memory access latency. While integration improves system performance, the microprocessor is tied to one type of memory, preventing processors and memory from being combined. different generations. The use of new types of memory requires the release of new processors and a change in their socket (for example, after the advent of DDR2 SDRAM, AMD released Athlon 64 processors using the new Socket AM2 socket).

The integration of the memory controller with the processor is not new technology So, back in the 1990s, the DEC Alpha 21066 and HP PA-7300LC used integrated controllers to reduce system costs.

Tasks

The memory controller contains the logic needed to perform read and write operations on the DRAM and to update the data stored in the DRAM. Without periodic updates, DRAM memory chips lose information, as capacitors that store bits are discharged by leakage currents. The typical time of reliable information storage is fractions of a second, but not less than 64 milliseconds according to JEDEC standards. For more long periods time information is only partially stored.

Multi-channel memory

Fully Buffered FB-DIMM Memory

Notes

Wikimedia Foundation. 2010 .

• Counteroffensive of the Eastern Front
• Control (disambiguation)

See what "Memory Controller" is in other dictionaries:

Interrupt controller- (English Programmable Interrupt Controller, PIC) a microcircuit or an integrated processor unit responsible for the possibility of sequential processing of interrupt requests from different devices. Contents 1 PIC 2 APIC ... Wikipedia

memory access controller- — [E.S. Alekseev, A.A. Myachev. English Russian Dictionary in computer systems engineering. Moscow 1993] Topics Information Technology in general EN memory access controllerMAC ...

Computer memory cell- "RAM" redirects here. See also other meanings. The simplest circuit interactions random access memory with CPU Random access memory (also random access memory, RAM) in computer science is memory, part of the computer memory system into which ... Wikipedia

Programmable Interrupt Controller- Interrupt controller chip or built-in processor unit responsible for the ability to sequentially process interrupt requests from different devices. The English name is Programmable Interrupt Controller (PIC). As a rule ... ... Wikipedia

Direct memory access- (English Direct Memory Access, DMA) data exchange mode between devices or between the device and the main memory (RAM) without the participation of the Central Processing Unit (CPU). As a result, the transfer rate increases, since the data is not ... ... Wikipedia

programmable logic controller- PLC [Intent] controller A control device that performs automatic control through software implementation of control algorithms. [Collection of recommended terms. Issue 107. Control Theory. USSR Academy of Sciences. Scientific Committee ... ... Technical Translator's Handbook

Function controller- Schematic layout of the south bridge on system board South Bridge (from the English Southbridge) (functional controller), also known as the I/O hub controller from the English. I/O Controller Hub (ICH). This is a chip that implements ... Wikipedia

USB controller- as part of a personal computer platform, provides communication with peripheral devices connected to the Universal Serial Bus. The USB controller is an intelligent device capable of interacting with ... ... Wikipedia

Programmable Logic Controller- A massively used programmable logic controller of the SIMATIC S7 300 family Programmable Logic Controller (PLC) (eng. Programmable Logic Controller, PLC) or programmable controller ele ... Wikipedia

professional graphics controller- The controller has 320 Kbytes of memory. Resolution - 640x480 image elements. Ability to display 256 colors from a palette containing more than 16 million shades. Topics information technology in general EN… … Technical Translator's Handbook

memory called a device for records (storage) and readings information.

The controller's memory stores:

1. manufacturer's service programs,
2. user programs,
3. controller configuration,
4. data blocks (values ​​of variables, timers, counters, markers, etc.).

memory properties. Memory is characterized by:

1. Memory capacity (KB, MB or GB).
2. The speed or time of memory access.
3. Energy dependence. Behavior after power off.

Rice. 3.4 Types of memory(author's drawing).

Operationalmemory(RAM - random access memory).

Advantage.

Is the most high-speed semiconductor electronic memory designed for short-term storage of information.

Flaw.

The main property of this memory is volatility, i.e. data loss after a power outage.

To buffer the RAM, some controllers use high-capacity batteries or electrical capacitors that can store an electrical charge for up to several days.

An element of random access memory is an electronic trigger (static memory) or an electric capacitor (dynamic memory).

Rice. 3.5 Trigger - the main element of RAM memory(author's drawing).

Dynamic memory requires cyclic charging of capacitors, however, it is cheaper than static memory.

memory matrixrepresents totality individual memory cells - triggers.

1 row of the matrix contains 8 memory cells (8 Bit corresponds to 1 Byte).

Each memory cell has its own unique address (row number “dot” bit number).

Rows (bits) are numbered from right to left from "0" to "7".

Lines (bytes) are numbered from top to bottom, starting from "0".

Rice. 3.6 Memory Matrix(author's drawing).

Persistent memory (ROM - read only memory) designed for long-term storage of information. The main difference from RAM is that it capable of storing information without a power source, i.e. is non-volatile.

This memory, in turn, is divided into two types: once(ROM) - and repeatedly reprogrammable(PROM) .

reprogrammable memory recorded by the user with the help of programmers. To do this, you must first delete memory content .

The old type of reprogrammable memory refers to EPROM- memory erased by ultraviolet rays (EPROM - erasable programmable read only memory).

Rice. 3.7 EPROM memory erased by ultraviolet rays (source http://ru.wikipedia.org/wiki/%D0%A4%D0%B0%D0%B9%D0%BB:Eprom.jpg) .

EEPROM (Electrically Erasable Programmable Read-Only Memory) - electrically erasable reprogrammable read-only memory (EEPROM), one of the types of non-volatile memory (such as PROM and EPROM ). This type of memory can be erased and filled with data up to a million times.

To date, the classic two-transistor EEPROM technology has been almost completely replaced by NOR flash memory. However, the name EEPROM is firmly entrenched in this segment of memory, regardless of technology.

Rice. 3.8 Flash memory programming.

(a sourcehttp://ru.wikipedia.org/wiki/%D0%A4%D0%B0%D0%B9%D0%BB:Flash_programming_ru.svg).

Flash memory (flash memory) is a kind of solid-state semiconductor non-volatile rewritable memory.

It can be read any number of times (within the data storage period, typically 10-100 years), but such memory can only be written to a limited number of times (maximum - about a million cycles). Contains no moving parts, so unlike hard drives, more reliable and compact.

Conditional division of controller memory areas

The controller provides the following memory areas for storing user program, data, and configuration.

Load memory is a non-volatile memory for the user program,

data and configuration. When a project is loaded into the controller, it is first stored in the load memory. This memory is either on the memory card (if available) or directly built-in. The non-volatile memory information is also retained when the power is turned off. The memory card supports more memory than the memory built into the controller.

working memoryis volatile memory. The controller copies some project elements from load memory to work memory. This area of ​​memory is lost when power is turned off, and the controller restores it when power is restored.

Retained memory is a non-volatile memory for a limited number of working memory values. This memory is used for selective storage important information user in the event of a power failure. In the event of a power failure, the controller has enough time to save the values ​​of a limited number of memory addresses. When the power is turned on, these stored values ​​are restored.

Information recovery

Rice. 3.9 Phases of information recovery (drawing by the author).

1. Information about the state of the control process, stored in RAM, is called management process POU. Those. all physical block terminals entry-exit have virtual twins (triggers) in the controller memory. Usually, to increase the speed of information exchange, the processor requests information in RAM (rather than physical input/output terminals). Writing the program processing results from the process image to the output terminals is done cyclically.

2. After the supply voltage is switched off (voltage drops below a critical level), the most important information is saved back from RAM to EEPROM. The areas of data to be stored are defined by the user.

Today in the civilized world you will hardly find a person who has never used a computer and has no idea what it is. Therefore, instead of once again talking about the well-known parts of this complex system, we will tell you about something that you do not yet know. We will discuss and give a short description of the memory controllers, without which the operation of the computer would be impossible. If you want to understand the system of your personal computer or laptop, then you must know this. And so, let's discuss today what memory controllers are.

The task that the computer's memory controllers face is very important for the operation of the computer. The memory controller is a chip that is located on the motherboard or on CPU. The main function that this tiny chip performs is to control the flow of data, both incoming and outgoing. The secondary function of the memory controller is to increase the potential and performance of the system, as well as the uniform and correct placement of information in memory, which is available thanks to new developments in the field of new technologies.

The location of the memory controller in your computer depends on certain models of motherboards and CPUs. In some computers, the designers have placed this chip on the north parallel connection of the motherboard, while in other computers they are placed on the "die" CPU. Those systems that are designed to install the controller in the motherboard have a large number of new different physical nests. The RAM that is used in computers of this type also has a new modern design.

The main purpose of using a memory controller in a computer is to allow the system to read and write changes to RAM and update it on every boot. This is due to the fact that the memory controller sends electrical charges, which, in turn, are signals to perform certain actions. Without delving into technical terminology, we can state the fact that memory controllers are one of the most important parts in a computer that allow the use of RAM, and without which its work would be impossible.

Memory controllers come in different types. They differ in:
- memory controllers with double data transfer rate (DDR);
- fully buffered memory controllers (FB);
- two-channel controllers (DC).

The functions that different types of memory controllers can perform differ from each other. For example, dual baud rate memory controllers are used to transfer data, depending on the increase or decrease of the memory clock rate. Whereas dual-channel memory uses two memory controllers parallel to each other. This allows the computer to increase the speed of the system by creating more channels, but despite the difficulties that come from using a bunch of wires, this system works quite efficiently. However, there are difficulties in creating new channels, so this species the memory controller is not flawless.

Fully buffered memory controllers, on the other hand, are different from other types of memory controllers. This technology uses serial data channels that are needed to communicate with motherboard and RAM circuits unlike other systems. Advantage of this type controllers is that fully buffered memory controllers reduce the number of wires that are used in the motherboard, and which allows you to reduce the time spent on the task.

As you have already seen, memory controllers are very necessary for the stable operation of the computer, and different types are used for different purposes. Prices for memory lines range from very high to very low, depending on the type and functions that a particular memory controller performs.